» VHDL Engineer/Team Leader

Our client is currently seeking a VHDL Engineer/Team Leader.

Job Description:
Definition, development, simulation, implementation and debugging of VHDL code for DSP and communication systems. Acting as team leader managing a team of 5 permanent plus some contract VHDL engineers. Managing the workload of the VHDL team around project priorities. The candidate will be expected to work at the Melbourn or Stevenage sites as required but the role will initially be based at the Melbourn site

Profile:
The successful candidate should be educated to degree level in Electronic engineering or a related discipline. You should have experience with circuit level design and debugging, alongside VHDL code development, simulation and debugging, preferably for communications. It is essential for you to have experience of the whole development process from specification to verification and a good understanding of signal processing and the speedy implementation of DSP and communication functions such as FFTs, filters, interleavers etc. Excellent proficiency in VHDL coding, simulation, implementation and debugging is also essential. Experience in implementation in Xilinx FPGAs and MATLAB and algorithms design experience would be desirable. The ability to work well in a team and also act as a team leader is required, so experience of leading a team would be desirable. A full driving license would be desirable for working between sites.

Melbourn, Cambridge | Salary £neg.
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